Independent project · local tools in development

Review KiCad changes with evidence you can trace

LoopLab develops local tools to check selected parts, compare declared changes and assess whether saved checks still match their inputs. Work is grounded in LDO/LED examples and a four-layer STM32 candidate, with human review at each decision.

Explore local checks Share your KiCad workflow

Specific examples · local tools and prototypes · no hosted demo

KiCad schematic of the 5 V to 3.3 V LDO and LED example — KiCad counts for this example only. Hardware and manufacturing are not verified.

Front render of the two-layer PCB from the same example — KiCad counts for this example only. Hardware and manufacturing are not verified.

Completed local work

Four checks, with a defined scope

Local tools with explicit inputs and a defined scope. Missing inputs, changed files and unsupported cases stay visible; a passing check does not approve a design for manufacturing.

Selected parts

Part correspondence

Compare part declarations, pin functions and numbered pads for one registered LDO and one LED. When evidence is missing, the result is held for review instead of guessed.

MCP1700T-3302E/TT · VLMS1300-GS08

Declared files and objects

Change scope and preservation

Compare a baseline with a candidate and check that only declared objects changed while frozen objects stayed intact. The read-only checker reports out-of-scope changes and input problems without editing the design.

One development project

Manufacturing data consistency

Compare saved KiCad design files with BOM and placement data for part values, fitted parts, position and rotation. Matches, mismatches and missing evidence are reported separately.

Saved evidence and declared dependencies

Evidence reuse checks

Check whether saved ERC/DRC reports remain tied to the current design, project and recorded dependencies by SHA. Missing or stale evidence is reported explicitly. This check does not run KiCad again or grant stage approval.

Current stage

Completed work, ongoing development and open questions

Evidence reviewed on 25 October 2026 · recorded results, not new hardware tests

Completed on specific examples

LDO/LED part and manufacturing-data checks, declared PCB change checks and saved-evidence checks are implemented locally. A four-layer STM32 candidate has scoped component, routing and silkscreen improvements with recorded KiCad checks. Electrical performance is not measured.

Tested prototypes / next work

Limited front-silkscreen checks and saved source/manufacturing-bundle checks have local prototype tests. The silkscreen checker reports preserved exceptions and unsupported cases, and is not in the shared template. A local handoff package reproduced the aggregation checks in two relocated folders; product API integration remains planned.

Still unverified / unavailable

Hardware, manufacturing and LED polarity are not verified; customer value is not yet measured. No hosted demo or running product API integration yet.

Share your experience Read verification limits

Actual KiCad output

See the actual KiCad output

The schematic and PCB below belong to the same initial 5 V to 3.3 V LDO and LED example. A separate schematic-style example follows the check results.

KiCad schematic: J1 5 V input, MCP1700-3.3V regulator U1 with 2.2 µF capacitors C1 and C2, 1 kΩ resistor R1 and red LED D1, J2 3.3 V output — Initial schematic · single sheet Preview is cropped to the drawn area. The original image includes the full canvas. Open original (opens in a new tab)

Front render of the two-layer PCB: J1 5 V and J2 3.3 V connectors, C1, U1, C2, R1, and D1 connected by green traces — Initial PCB · two layers, front render The initial board, paired with the schematic above. Its LED branch is connected to 3V3. Open original (opens in a new tab)

Initial example: KiCad checks

This example only

Input: 5 V → 3.3 V LDO + LED
Schematic: Single sheet, single unit
PCB: Two layers
ERC violations: 0
DRC violations: 0
Schematic mismatches: 0
Unrouted connections: 0
File candidates: Gerber · Drill · BOM · placement — for review

Recorded KiCad counts for the initial LDO and LED example only.

Current verification limits

Each checker needs explicit inputs and references; arbitrary project intake and general PCB generation are not provided
LED physical polarity is not verified; missing part information is never filled in by guesswork
Hardware operation, heat, load behavior and manufacturing suitability are unverified
Manufacturing-file candidates still require design review and manufacturer approval
Customer time savings and purchase demand have not been measured

Zero violations or a completed test do not mean a design is correct or ready to manufacture. Expected test results include mismatches and held findings.

Separate LDO schematic with raised power labels and the LED branch connected to VIN — Separate example A clearer schematic layout, with connections preserved Power labels moved up and ground routed inside, re-applying a chosen schematic style. In this separate example the LED branch is on VIN (on 3V3 in the initial PCB above). Connections and ERC were checked for this example. Open original (opens in a new tab)

How local checks work

Compare the files, keep the evidence, review the findings

Define the checked scope

Before running a supported check, fix the example version, the registered part references and the allowed changes.
Compare and preserve

Read the saved files, compare supported values with the reference data, and record differences and missing information. Scoped changes are made only in copies.

Keep the original files
Review each finding

A person reviews mismatches, held findings and input or reference errors. KiCad check results are recorded separately from part and data comparisons.

Human design and manufacturing review

Customer discovery

What takes the most time in your KiCad revisions?

We would like to hear from individual developers and small hardware teams who revise existing schematics or PCBs. A 15-minute chat or a few questions by email would help us understand recent tasks and current workarounds.

hello@looplab.space

No design files or confidential details needed. This is an invitation to share your experience; no purchase is required.